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TRIMUX - dual balanced ternary multiplexer/demultiplexer

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TRIMUX:

TRIMUX on Twitpic Testing of TRIMUXes...  on Twitpic TRIMUX kit ready to go on Twitpic One ternary multiplexer from #trimux is connected as buffer on Twitpic Another ternary multiplexer from #trimux is connected as inve... on Twitpic #trimux in action - thanks to rvnick for this picture on Twitpic Assembled TRIMUX pic#1 on Twitpic Assembled TRIMUX pic#2 on Twitpic Assembled TRIMUX pic#3 on Twitpic

IC1,IC2: DG403 (DIP16), C1-C4: 0.1uF (tantalum), JP1,JP2:right-angle 5-pin headers, JP3: right-angle 3-pin header

Connector JP1:
1) S1 - select input of the 1st ternary multiplexer
2) N1 - connected to C1 if S1=N ("negative" or -5V)
3) O1 - connected to C1 if S1=O ("zero" or 0V)
4) P1 - connected to C1 if S1=P ("positive" or +5V)
5) C1 - common signal of the 1st ternary multiplexer

Connector JP2:
1) S2 - select input of the 2nd ternary multiplexer
2) N2 - connected to C2 if S2=N ("negative" or -5V)
3) O2 - connected to C2 if S2=O ("zero" or 0V)
4) P2 - connected to C2 if S2=P ("positive" or +5V)
5) C2 - common signal of the 2nd ternary multiplexer

Connector JP3:
1) V-NEG - negative voltage (typically -5V)
2) GND - ground wire
3) V-POS - positive voltage (typically +5V)


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